1. Field of the Invention
The present invention generally relates to semiconductor devices and methods for producing the same, and more particularly to a semiconductor device and a method for producing the semiconductor device, which is configured to have a plurality of semiconductor elements stacked therein.
In recent years, with increasing demand for miniaturized portable equipment such as a portable telephone, a semiconductor device, which is carried therein, has also been required to become smaller. In order to support this situation, a stack-type semiconductor device, which has a plurality of semiconductor elements stacked within resin for encapsulation (a package) thereof, is developed.
2. Description of the Related Art
FIGS. 1 and 2 show a conventional stack-type semiconductor device 1A which comprises a plurality of leads 5 serving as connecting terminals. FIG. 1 is a cross-sectional view of the semiconductor device 1A and FIG. 2 is plan view of the semiconductor device 1A where encapsulating resin 6A is partly removed.
The semiconductor device 1A shown in FIGS. 1 and 2 is configured to have three semiconductor elements 2, 3 and 4 which are stacked on a stage portion 5a provided on the leads 5. On the semiconductor elements 2, 3 and 4, there are respectively provided first electrodes 7, second electrodes 8 and third electrodes 9, which are connected to bonding-pads 5c of the leads 5 via first wires 10, second wires 11 and third wires 12, respectively. Also, outer leads 5b of the leads 5 are formed extending to the outside thereof, for example, like a gull wing.
Since the semiconductor device 1A shown in FIGS. 1 and 2 is configured such that the outer leads 5b extend out of the encapsulating resin 6A and the bonding-pads 5c to which the wires 10 through 12 are joined are formed outside the semiconductor elements 2 through 4, this results in a large size of the semiconductor device 1A. Further, although the semiconductor device 1A has a multi-pin structure resulting from the high-density and stack of the semiconductor elements 2 through 4, there is a limit to shortening pitches of the adjacent leads 5 and this also results in the large size of the semiconductor device 1A.
On the other hand, FIGS. 3 and 4 show a conventional BGA-type (ball grid array type) semiconductor device 1B which has a plurality of solder balls 15 serving as connecting terminals. FIG. 3 is a cross-sectional view of the semiconductor device 1B and FIG. 4 is a plan view of the semiconductor device 1B where the encapsulating resin 6B is partly removed. In addition, in FIGS. 3 and 4, parts, which are the same as those shown in FIGS. 1 and 2, are given the same reference numerals.
The BGA-type semiconductor device 1B is configured to have first, second and third semiconductor elements 2, 3 and 4 which are stacked on a substrate 13 thereof, for example, a printed wiring substrate. On the semiconductor elements 2. 3 and 4, there are respectively provided electrodes 7, 8 and 9. These electrodes 7 through 9, using first, second and third wires 10, 11 and 12 respectively, are connected to a plurality of bonding pads 14 which is formed on the substrate 13 where the semiconductor elements 2 through 4 are stacked.
The plurality of bonding pads 14 are connected to the respective solder balls 15 via through-holes and wires (both not shown). Thus, each of the semiconductor elements 2, 3 and 4 is connected to the solder balls 15 via the wires 10 through 12, the bonding pads 14, the not-shown through-holes and wires.
As previously described, since the BGA-type semiconductor device 1B is configured such that the solder balls 15 serving as connecting terminals are provided under the stacked semiconductor elements 2 through 4, it can be produced smaller in size than the semiconductor device 1A of FIGS. 1 and 2. Further, since the adjacent pitches of the bonding pads 14 can be designed narrower than those of the leads 5 shown in FIGS. 1 and 2, the bonding pads 14 can support the multi-pin structure.
As can be seen from FIGS. 1 through 4, however, either in the semiconductor devices 1A or 1B, since the leads 5 or the bonding pads 14 are connected to the semiconductor elements 2, 3 and 4 by using the wires 10, 11 and 12, it is imperative that the wires 10, 11 and 12 be laid within the encapsulating resin 6A or 6B.
Particularly, in the semiconductor device 1A or 1B where the semiconductor elements 2 through 4 are stacked, the first wires 10 need to be laid long enough so that the uppermost-positioned semiconductor element 2 can be connected to the leads 5 or the bonding pads 14. Thereby loop heights of the first wires 10 (heights from the leads 5 or the bonding pads 14 to the first wires 10) become high and this results in a large size (particularly, in height) of the semiconductor device 1A or 1B.
In order to solve the above mentioned problems and miniaturize the semiconductor devices 1A and 1B, it is necessary to lower the wires 10 through 12. Lowering the wires 10 through 12, however, brings about a problem that wires 10 through 12 may contact corner portions of the semiconductor elements 2 through 4, or adjacent wires thereof may contact each other to generate a short-circuit. As a result, reliability of the semiconductor device 1A or 1B is degraded.